Adding support for a new STM32 board in Miosix

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Miosix's main target platform is, naturally, STM32 microcontrollers by ST Microelectronics, in part for historical reasons, but mainly because STM32 chips (and their clones) are extremely popular for both the industry and hobbyists.

However, the success of the STM32 line has spawned an abundance of different chips, all with different sets of built-in peripherals, Flash sizes, Ram sizes, CPU cores, and so on. Fortunately, most STM32 chips are similar enough that it is usually easy to port a new STM32 board to Miosix.

Components of a Miosix port

The core of the Miosix kernel is platform-independent. The contact point between the platform-independent part of Miosix and the platform-dependent parts consist in a set of interfaces that need to be fully implemented for a board to function.

The header files that define these interfaces are in the miosix/interfaces and miosix/interfaces_private directories. The implementations are in the arch directory, split by board, chip and cpu.

The Miosix build system makes sure that the correct board/chip/cpu-specific header files and source code files for the selected board are used during the compilation.

A port of Miosix to a new board needs to provide the files required for the missing interfaces implementations.

Miosix interfaces

Miosix's interfaces are usually implemented either at CPU level, at chip level, or board level, depending on the case.

Caption text
Header Typical Implementation Private Description
interfaces/arch_registers.h arch/board/<board_name>/interfaces-impl/arch_registers_impl.h No Register definitions for the chip.
interfaces/atomic_ops.h arch/cpu/<cpu_name>/interfaces-impl/atomics_ops_impl.h No Implementation of atomic primitives
interfaces/bsp.h, interfaces_private/bsp_private.h arch/board/<board_name>/interfaces-impl/{bsp_impl.h,bsp.cpp} In part Board Support Package: configuration of the board at boot, board reboot and shutdown
interfaces/cpu_const.h arch/cpu/<cpu_name>/interfaces-impl/cpu_const_[smp_]impl.h No Low-level CPU architecture parameters, such as the number of CPU cores, configurables regarding the behavior during context switches, and so on. (SMP file only for SMP platforms)
interfaces/delays.h arch/chip/<chip_name>/interfaces-impl/delays.cpp No Low-level delays implemented by CPU spinning (no timers allowed, used early at boot)
interfaces/endianness.h arch/cpu/<cpu_name>/interfaces-impl/endianness_impl.h No Optimized implementation of byte-swapping primitives, for big endian support
interfaces/gpio.h arch/chip/<chip_name>/interfaces-impl/gpio_impl.h No Gpio class implementation for this chip. Usually just includes one of the Gpio drivers in arch/drivers/gpio.
interfaces/interrupts.h arch/cpu/<cpu_name>/interfaces-impl/interrupts_impl.h No Implementation of primitives for enabling or disabling interrupts, and for registering IRQ vectors.
interfaces/poweroff.h arch/chip/<chip_name>/interfaces-impl/poweroff.cpp No Chip reboot and shutdown
interfaces_private/cpu.h arch/cpu/<cpu_name>/interfaces-impl/{cpu_impl.h,cpu.cpp} Yes Context switching primitives
interfaces_private/os_timer.h arch/drivers/os_timer/... Yes Timer driver for context switches and general kernel timekeeping
interfaces_private/sleep.h arch/drivers/sleep/... Yes CPU sleep and deep sleep (deep sleep is implemented in arch/chip or arch/board)
interfaces_private/smp_locks.h arch/chip/<chip_name>/interfaces-impl/smp_locks_impl.h Yes Implementation of spinlocks (SMP platforms only)
interfaces_private/smp.h arch/chip/<chip_name>/interfaces-impl/smp.cpp Yes Initialization of other CPU cores and SMP primitives (SMP platforms only)
interfaces_private/userspace.h arch/cpu/<cpu_name>/interfaces-impl/userspace_impl.h Yes Implementation of memory protection primitives