Stm32f407vg stm32f4discovery: Difference between revisions

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===STM32 F4===
;STM32F4DISCOVERY
{{Infobox CPU
* A [http://www.st.com/web/catalog/tools/PF252419 discovery board] for [http://www.st.com/web/catalog/mmc/FM141/SC1169/SS1577/LN11/PF252140 STM32F407VGT6] microcontroller with 168&nbsp;MHz [[ARM Cortex-M4F]] core, 1024&nbsp;KB Flash, 192&nbsp;KB RAM, 4&nbsp;KB battery-backed RAM in [[LQFP]]100 package.<ref name="PR-20110921"/>
|name          = STM32 F4 Series <ref name="STM32-F4-WebSite">[http://www.st.com/web/en/catalog/mmc/FM141/SC1169/SS1577 STM32 F4 Website; STMicroelectronics.]</ref>
* This board includes an integrated [http://www.st.com/web/catalog/tools/PF219866 ST-LINK/V2] debugger via [[Mini-USB|Mini-B USB]] connector, [[accelerometer]] (LIS302DL), [[microphone]] (MP45DT02), audio [[codec]] (CS43L22), [[Phone connector (audio)|3.5&nbsp;mm audio jack]], 4 user LEDs, user button, reset button, Full-Speed [[USB On-The-Go|USB OTG]] to second [[MicroUSB|Micro-AB USB]] connector, and two 25x2 male [[pin header]]s.
|image          =
* A separate [http://www.farnell.com/datasheets/1671410.pdf STM32F4DIS-BB] baseboard is available.
|caption        =
 
|produced-start = 2011
 
|produced-end  = Current
=== Configuring the kernel ===
|slowest        = 84
Unlike the stm32vldiscovery, this board has the STLink/V2 firmware which is much more Linux friendly. All you need is a recent version of OpenOCD and the [https://github.com/fpoussin/QStlink2 QStlink2] tool to support ths board.
|fastest        = 180
 
|slow-unit      =
First, make sure the correct board is selected in the '''miosix/config/[http://gitorious.org/miosix-kernel/miosix-kernel/blobs/master/miosix/config/Makefile.inc Makefile.inc]''' file.
|fast-unit      = MHz
The line defining the OPT_BOARD variable should be set to '''OPT_BOARD := stm32f407vg_stm32f4discovery''', that is, that line should be uncommented, and the other commented out, like this:
|size-from      = 90&nbsp;nm
 
|size-to        =
<source lang="CPP">
|arch          = [[ARM architecture#Thumb|Thumb]], [[ARM architecture#Thumb-2|Thumb-2]],<br/>[[Saturation arithmetic|Sat Math]], [[ARM architecture#DSP enhancement instructions|DSP]], [[ARM architecture#VFP|FPU]]
##
|microarch      = [[ARM Cortex-M4F]] <ref name="M4-Spec"/>
## Target board, choose one. This also implicitly select the target
}}
## architecture
The STM32 F4-series is the first group of STM32 microcontrollers based on the ARM Cortex-M4F core. The F4-series is also the first STM32 series to have DSP and floating point instructions. The F4 is [[Pin-compatibility|pin-to-pin compatible]] with the STM32 F2-series and adds higher clock speed, 64K CCM static RAM, full duplex I²S, improved real-time clock, and faster ADCs.  The summary for this series is:<ref name="PR-20110921"/><ref name="PR-20130220"/><ref name="PR-20130430"/><ref name="STM32-F4-WebSite"/><ref name="STM-F4-MarketingSlides">[http://www.st.com/st-web-ui/static/active/en/resource/sales_and_marketing/presentation/product_presentation/stm32f4_marketing_pres.pdf STM32 F4 Marketing Slides; STMicroelectronics.]</ref>
##
* Core:
#OPT_BOARD := lpc2138_miosix_board
** [[ARM Cortex-M4F]] core at a maximum clock rate of 84 / 168 / 180&nbsp;[[MHz]].
#OPT_BOARD := stm32f103ze_stm3210e-eval
* Memory:
#OPT_BOARD := stm32f103ve_mp3v2
** [[Static RAM]] consists of up to 192&nbsp;KB general purpose, 64&nbsp;KB core coupled memory (CCM), 4&nbsp;KB battery-backed, 80&nbsp;bytes battery-backed with tamper-detection erase.
#OPT_BOARD := stm32f100rb_stm32vldiscovery
** [[Flash memory|Flash]] consists of 512 / 1024 / 2048&nbsp;[[Kilobyte|KB]] general purpose, 30&nbsp;KB system boot, 512&nbsp;bytes one-time programmable (OTP), 16 option bytes.
#OPT_BOARD := stm32f103ve_strive_mini
** Each chip has a factory-programmed 96-bit unique device identifier number.
#OPT_BOARD := stm32f103ze_redbull_v2
* Peripherals:
OPT_BOARD := stm32f407vg_stm32f4discovery
** Common peripherals included in all IC packages are [[USB]]&nbsp;2.0 [[USB On-The-Go|OTG]] HS and FS, two [[Controller area network|CAN]] 2.0B, one [[Serial Peripheral Interface Bus|SPI]] + two SPI or full-duplex [[I²S]], three [[I²C]], four [[USART]], two [[UART]], [[Secure Digital#SDIO|SDIO]] for [[Secure Digital|SD]]/[[MultiMediaCard|MMC]] cards, twelve 16-bit [[Timers#Computer timers|timers]], two 32-bit timers, two [[Watchdog timer|watchdog]] timers, [[temperature]] sensor, 16 or 24 channels into three [[Analog-to-digital converter|ADC]]s, two [[Digital-to-analog converter|DAC]]s, 51 to 140 [[General Purpose Input/Output|GPIO]]s, sixteen [[Direct memory access|DMA]], improved real-time clock ([[Real-time clock|RTC]]), [[cyclic redundancy check]] (CRC) engine, [[random number generation|random number generator]] (RNG) engine. Larger IC packages add 8/16-bit external [[memory bus]] capabilities.
#OPT_BOARD := stm32f207ig_stm3220g-eval
** The STM32F4x7 models add [[ethernet]] [[Media Independent Interface|MAC]] and [[camera interface]].
#OPT_BOARD := stm32f207zg_ethboard_v2
** The STM32F41x/43x models add a [[Cryptographic accelerator|cryptographic processor]] for [[Data Encryption Standard|DES]] / [[Triple DES|TDES]] / [[Advanced Encryption Standard|AES]], and a hash processor for [[SHA-1]] and [[MD5]].
</source>
** The STM32F4x9 models add a [[TFT LCD|LCD-TFT]] controller.
In addition, this board has a couple of board-specific options in the Makefile.inc file. For convenience, the relevant part of that configuration file is reported here so as to be easily located within the file
* [[Electronic oscillator|Oscillators]] consists of internal (16&nbsp;MHz, 32&nbsp;kHz), optional external (4 to 26&nbsp;MHz, 32.768 to 1000&nbsp;kHz).
 
* [[Integrated circuit packaging|IC packages]]: [[WLCSP]]64, [[LQFP]]64, LQFP100, LQFP144, LQFP176, [[UFBGA]]176. STM32F429/439 also offers LQFP208 and [[UFBGA]]216.
<source lang="CPP">
* Operating [[IC power supply pin|voltage]] range is 1.8 to 3.6&nbsp;[[volt]].
##---------------------------------------------------------------------------
{{clear}}
## stm32f407vg_stm32f4discovery
##
ifeq ($(OPT_BOARD),stm32f407vg_stm32f4discovery)
 
  ## Linker script type, there are two options
  ## 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
  ## 2) Code + stack + heap in internal RAM (file *_ram.ld)
  LINKER_SCRIPT_PATH := arch/cortexM4_stm32f4/stm32f407vg_stm32f4discovery/
  LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_1m+192k_rom.ld
  #LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_1m+192k_ram.ld
 
  ## This causes the interrupt vector table to be relocated in SRAM, must be
  ## uncommented when using the ram linker script
  #SRAM_BOOT := -DVECT_TAB_SRAM
 
endif
</source>
 
As can be seen, the file is made mostly of comments, and defines three options: '''LINKER_SCRIPT''' and '''SRAM_BOOT'''. The comments explain in detail the meaning of there options, so it isn't necessary to further explain them.
 
Then you should disable filesystem support. Since this board lacks a microSD card or other hardware that could support a filesystem, the bsp has no filesystem backend implementation and if you leave the filesystem enabled the kernel will fail to compile saying it can't find a backend.
To do so, open the '''miosix/config/[http://gitorious.org/miosix-kernel/miosix-kernel/blobs/master/miosix/config/miosix_settings.h miosix_settings.h]''' and comment out the
 
#define WITH_FILESYSTEM
 
After modifying configuration files it is recomended to do a '''make clean; make''' (or in the Netbeans IDE, to click on the "Clean and build project" button) to be sure that changes are applied.
 
 
=== Loading code ===
As explained before, there are more than one linker script for this board, and the selected linker script affects the way code should be loaded on the board.
*The stm32_1m+192k_rom.ld is the '''default linker script''', and put the code in FLASH, so you need to program the microcontroller's FLASH every time you change your code, but code will run faster and won't be lost at each reboot.<br />A simple way to load code in FLASH is to use the [[QStlink2]] tool.  
*The stm32_1m+192k_ram.ld linker script is very useful for debugging code on this board, as it locates everything (code, stack, heap) in the microcontroller's RAM.<br />It has the disadvantage that the loaded code is lost upon reboot (being in a volatile memory), but for debugging,it is not an issue.
 
=== stdout redirection ===
 
The board support package of this board is a little different from the other, as by default it will redirect stdout (but not stdin!) through the '''debug communication channel'''. This means that if you are debugging your board with OpenOCD+gdb, you'll see the output of printf directly in your gdb shell. Since the debug communication channel is unidirectional, stdin is redirected nowhere, and attempting to read from it will result in an infinte loop.
This has been done to keep the board "self contained", that is, to be able to write and test code without adding additional hardware.
 
If on the other hand, you have a 3.3V logic level USB to serial adapter, such as one based on the FT232 chip, you can still redirect printf to the serial port USART3 (GPIO PB10 and PB11 on the board). This also has the advantage of making both stdout and stdin work.
To do so, edit the file '''miosix/arch/cortexM4_stm32f4/stm32f407vg_stm32f4discovery/[https://gitorious.org/miosix-kernel/miosix-kernel/blobs/master/miosix/arch/cortexM4_stm32f4/stm32f407vg_stm32f4discovery/board_settings.h board_settings.h]''' and comment out the line #define STDOUT_REDIRECTED_TO_DCC
 
=== In Circuit Debugging ===
Before you begin you should note that the Miosix kernel will put the CPU to a '''low power state''' when no thread is running. This low power state will usually confuse debuggers and make them lose sync with the CPU. To avoid this you need to edit the '''miosix/config/[http://gitorious.org/miosix-kernel/miosix-kernel/blobs/master/miosix/config/miosix_settings.h miosix_settings.h]''' file and uncomment
#define JTAG_DISABLE_SLEEP
This will prevent the kernel from putting the CPU in its low power state making debugging possible.
Also, to be able to precisely single-step your code you need to '''disable compiler optimizations''' as gdb is incapable of reliably debug an optimized code. The option is in the miosix/config/Makefile.inc file and is the OPT_OPTIMIZATION := -O0 that should be uncommented while the other lines related to the same option should be commented out.
 
After modifying configuration files it is recomended to do a '''make clean; make''' (or in the Netbeans IDE, to click on the "Clean and build project" button) to be sure that changes are applied.
 
Since the board has an on board SWD in circuit debugger, simply '''plugging the USB cable''' is all you need from an hardware point of view.
On the software side, you need to '''open two shells'''. In one do a
 
sudo openocd -f miosix/arch/cortexM4_stm32f4/stm32f407vg_stm32f4discovery/stm32f4discovery.cfgg
 
This will start the OpenOCD program that will connect to the board and listen for GDB connections.
 
=== Miosix GPIO Mapping ===
 
=== Resource ===
*stm32f4discovery [http://www.st.com/st-web-ui/static/active/en/resource/technical/document/user_manual/DM00039084.pdf Datasheet]

Revision as of 21:20, 15 December 2014

STM32F4DISCOVERY


Configuring the kernel

Unlike the stm32vldiscovery, this board has the STLink/V2 firmware which is much more Linux friendly. All you need is a recent version of OpenOCD and the QStlink2 tool to support ths board.

First, make sure the correct board is selected in the miosix/config/Makefile.inc file. The line defining the OPT_BOARD variable should be set to OPT_BOARD := stm32f407vg_stm32f4discovery, that is, that line should be uncommented, and the other commented out, like this:

##
## Target board, choose one. This also implicitly select the target
## architecture
##
#OPT_BOARD := lpc2138_miosix_board
#OPT_BOARD := stm32f103ze_stm3210e-eval
#OPT_BOARD := stm32f103ve_mp3v2
#OPT_BOARD := stm32f100rb_stm32vldiscovery
#OPT_BOARD := stm32f103ve_strive_mini
#OPT_BOARD := stm32f103ze_redbull_v2
OPT_BOARD := stm32f407vg_stm32f4discovery
#OPT_BOARD := stm32f207ig_stm3220g-eval
#OPT_BOARD := stm32f207zg_ethboard_v2

In addition, this board has a couple of board-specific options in the Makefile.inc file. For convenience, the relevant part of that configuration file is reported here so as to be easily located within the file

##---------------------------------------------------------------------------
## stm32f407vg_stm32f4discovery
##
ifeq ($(OPT_BOARD),stm32f407vg_stm32f4discovery)

  ## Linker script type, there are two options
  ## 1) Code in FLASH, stack + heap in internal RAM (file *_rom.ld)
  ## 2) Code + stack + heap in internal RAM (file *_ram.ld)
  LINKER_SCRIPT_PATH := arch/cortexM4_stm32f4/stm32f407vg_stm32f4discovery/
  LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_1m+192k_rom.ld
  #LINKER_SCRIPT := $(LINKER_SCRIPT_PATH)stm32_1m+192k_ram.ld

  ## This causes the interrupt vector table to be relocated in SRAM, must be
  ## uncommented when using the ram linker script
  #SRAM_BOOT := -DVECT_TAB_SRAM

endif

As can be seen, the file is made mostly of comments, and defines three options: LINKER_SCRIPT and SRAM_BOOT. The comments explain in detail the meaning of there options, so it isn't necessary to further explain them.

Then you should disable filesystem support. Since this board lacks a microSD card or other hardware that could support a filesystem, the bsp has no filesystem backend implementation and if you leave the filesystem enabled the kernel will fail to compile saying it can't find a backend. To do so, open the miosix/config/miosix_settings.h and comment out the

#define WITH_FILESYSTEM

After modifying configuration files it is recomended to do a make clean; make (or in the Netbeans IDE, to click on the "Clean and build project" button) to be sure that changes are applied.


Loading code

As explained before, there are more than one linker script for this board, and the selected linker script affects the way code should be loaded on the board.

  • The stm32_1m+192k_rom.ld is the default linker script, and put the code in FLASH, so you need to program the microcontroller's FLASH every time you change your code, but code will run faster and won't be lost at each reboot.
    A simple way to load code in FLASH is to use the QStlink2 tool.
  • The stm32_1m+192k_ram.ld linker script is very useful for debugging code on this board, as it locates everything (code, stack, heap) in the microcontroller's RAM.
    It has the disadvantage that the loaded code is lost upon reboot (being in a volatile memory), but for debugging,it is not an issue.

stdout redirection

The board support package of this board is a little different from the other, as by default it will redirect stdout (but not stdin!) through the debug communication channel. This means that if you are debugging your board with OpenOCD+gdb, you'll see the output of printf directly in your gdb shell. Since the debug communication channel is unidirectional, stdin is redirected nowhere, and attempting to read from it will result in an infinte loop. This has been done to keep the board "self contained", that is, to be able to write and test code without adding additional hardware.

If on the other hand, you have a 3.3V logic level USB to serial adapter, such as one based on the FT232 chip, you can still redirect printf to the serial port USART3 (GPIO PB10 and PB11 on the board). This also has the advantage of making both stdout and stdin work. To do so, edit the file miosix/arch/cortexM4_stm32f4/stm32f407vg_stm32f4discovery/board_settings.h and comment out the line #define STDOUT_REDIRECTED_TO_DCC

In Circuit Debugging

Before you begin you should note that the Miosix kernel will put the CPU to a low power state when no thread is running. This low power state will usually confuse debuggers and make them lose sync with the CPU. To avoid this you need to edit the miosix/config/miosix_settings.h file and uncomment

#define JTAG_DISABLE_SLEEP 

This will prevent the kernel from putting the CPU in its low power state making debugging possible. Also, to be able to precisely single-step your code you need to disable compiler optimizations as gdb is incapable of reliably debug an optimized code. The option is in the miosix/config/Makefile.inc file and is the OPT_OPTIMIZATION := -O0 that should be uncommented while the other lines related to the same option should be commented out.

After modifying configuration files it is recomended to do a make clean; make (or in the Netbeans IDE, to click on the "Clean and build project" button) to be sure that changes are applied.

Since the board has an on board SWD in circuit debugger, simply plugging the USB cable is all you need from an hardware point of view. On the software side, you need to open two shells. In one do a

sudo openocd -f miosix/arch/cortexM4_stm32f4/stm32f407vg_stm32f4discovery/stm32f4discovery.cfgg 

This will start the OpenOCD program that will connect to the board and listen for GDB connections.

Miosix GPIO Mapping

Resource

*stm32f4discovery Datasheet
  1. Cite error: Invalid <ref> tag; no text was provided for refs named PR-20110921